The present invention generally relates to write circuits for erasable programmable read only memory devices of microcomputers. More particularly, the present invention is directed to a write circuit for an erasable programmable read only memory device of a microcomputer in which write-in addresses of the erasable programmable read only memory device can be generated by applying a low-frequency external clock signal to the write circuit.
Conventionally, when writing information into an erasable programmable read only memory (hereinafter simply referred to as an EPROM) of a microcomputer, there is a need to supply addresses of the EPROM from outside of the microcomputer. The conventional microcomputer consists of a program counter, a plurality of multiplexers, a word line driver, the EPROM and the like. Because the program counter operates in synchronization with a machine clock signal having a period of 2 to 3 microseconds during a normal operation mode (such as a read operation mode), it is impossible to obtain a sufficiently long write cycle in the order of 50 milliseconds from outputs of the program counter. For this reason, the microcomputer is provided with address terminals for receiving a write-in address during the write (program) operation mode. Thus, the multiplexers couple the outputs of the program counter to the word line driver during the normal operation mode, and switch over to couple the address terminals to the word line driver during the write operation mode.
However, especially in the case of a one-chip microcomputer, there is a limit to the number of terminals that can be provided. Accordingly, it is disadvantageous to reserve terminals for the address terminals described before. In addition, the conventional write circuit for the EPROM of the microcomputer suffers a problem in that the circuit construction is complex because of the need to provide the multiplexers for multiplexing the outputs of the program counter and the write-in address from the address terminals.